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 NUP4201MR6 Low Capacitance TSOP-6 Diode-TVS Array for High Speed Data Lines Protection
The NUP4201MR6 transient voltage suppressor is designed to protect high speed data lines from ESD, EFT, and lighting.
Features: http://onsemi.com
* Low Capacitance (3 pF Maximum Between I/O Lines) * ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model * Protection for the Following IEC Standards:
and Class C (Exceeding 400 V) per Machine Model IEC 61000-4-2 (ESD) 15 kV (air) 8 kV (contact) IEC 61000-4-4 (EFT) 40 A (5/50 ns) IEC 61000-4-5 (lighting) 23 A (8/20 ms) UL Flammability Rating of 94 V-0 Pb-Free Package is Available High Speed Communication Line Protection USB 1.1 and 2.0 Power and Data Line Protection Digital Video Interface (DVI) Monitors and Flat Panel Displays
TSOP-6 LOW CAPACITANCE DIODE TVS ARRAY 500 WATTS PEAK POWER 6 VOLTS
PIN CONFIGURATION AND SCHEMATIC
I/O 1 VN 2 I/O 3 6 I/O 5 VP 4 I/O
* * * * * *
Typical Applications:
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Peak Power Dissipation 8 x 20 mS @ TA = 25C (Note 1) Operating Junction Temperature Range Storage Temperature Range Lead Solder Temperature - Maximum (10 Seconds) Human Body Model (HBM) Machine Model (MM) IEC 61000-4-2 Air (ESD) IEC 61000-4-2 Contact (ESD) Symbol Ppk TJ Tstg TL ESD Value 500 -40 to +125 -55 to +150 235 16000 400 20000 20000 Unit W C C C V
6 1 TSOP-6 CASE 318G PLASTIC
MARKING DIAGRAM
63M
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Non-repetitive current pulse per Figure 1 (Pin 5 to Pin 2)
63 = Specific Device Code M = Date Code
ORDERING INFORMATION
Device NUP4201MR6T1 NUP4201MR6T1G Package TSOP-6 Shipping 3000/Tape & Reel
TSOP-6 3000/Tape & Reel (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2005
1
March, 2005 - Rev. 1
Publication Order Number: NUP4201MR6/D
NUP4201MR6
ELECTRICAL CHARACTERISTICS (TJ=25C unless otherwise specified)
Parameter Reverse Working Voltage Breakdown Voltage Reverse Leakage Current Clamping Voltage Clamping Voltage Maximum Peak Pulse Current Junction Capacitance Junction Capacitance Symbol VRWM VBR IR VC VC IPP CJ CJ (Note 2) IT=1 mA, (Note 3) VRWM = 5 V IPP = 5 A (Note 4) IPP = 8 A (Note 4) 8x20 ms Waveform VR = 0 V, f=1 MHz between I/O Pins and GND VR = 0 V, f=1 MHz between I/O Pins 3.0 1.5 6.0 5.0 12.5 20 25 5.0 3.0 Conditions Min Typ Max 5.0 Unit V V mA V V A pF pF
2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 3. VBR is measured at pulse test current IT. 4. Non-repetitive current pulse per Figure 1 (Pin 5 to Pin 2)
TYPICAL PERFORMANCE CURVES
(TJ = 25C unless otherwise noted) 100 PEAK POWER DISSIPATION (%) % OF PEAK PULSE CURRENT 90 80 70 60 50 40 30 20 10 0 0 25 50 75 100 125 150 175 200
100 90 80 70 60 50 40 30 20 10 0 0
tr
PEAK VALUE IRSM @ 8 ms PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms HALF VALUE IRSM/2 @ 20 ms
tP
20
40 t, TIME (ms)
60
80
TA, AMBIENT TEMPERATURE (C)
Figure 1. Pulse Derating Curve
5.0 JUNCTION CAPACITANCE (pF) 4.5 CLAMPING VOLTAGE (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 5 I/O lines I/O-Ground 20 18 16 14 12 10 8 6 4 2 0 0
Figure 2. 8 x 20 ms Pulse Waveform
10
20
30
40
50
VBR, REVERSE VOLTAGE (V)
PEAK PULSE CURRENT (A)
Figure 3. Junction Capacitance vs Reverse Voltage
Figure 4. Clamping Voltage vs. Peak Pulse Current (8 x 20 ms Waveform)
http://onsemi.com
2
NUP4201MR6
PACKAGE DIMENSIONS
TSOP-6 CASE 318G-02 ISSUE N
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS DIM MIN MAX A 2.90 3.10 B 1.30 1.70 C 0.90 1.10 D 0.25 0.50 G 0.85 1.05 H 0.013 0.100 J 0.10 0.26 K 0.20 0.60 L 1.25 1.55 M 0_ 10 _ S 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181
A L
6 5 1 2 4 3
S
B
D G M 0.05 (0.002) H C K J
SOLDERING FOOTPRINT*
2.4 0.094
1.9 0.075
0.95 0.037 0.95 0.037
0.7 0.028 1.0 0.039
SCALE 10:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
3
NUP4201MR6
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
http://onsemi.com
4
NUP4201MR6/D


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